What is considered high speed PCB design?

Key Aspects of High Speed PCB Design

Several important considerations come into play when designing PCBs for high speed applications:

Signal Integrity

Maintaining good signal integrity is critical in high speed designs. This involves controlling impedance, minimizing crosstalk and reflections, and maintaining consistent return current paths. High speed signals are very sensitive to discontinuities in their path.

Some key signal integrity concerns include:

  • Impedance matching – The characteristic impedance of the traces must match the impedance of the driver, receiver, and terminations. Any mismatches will cause reflections.
  • Crosstalk – Crosstalk occurs when a signal on one trace couples onto an adjacent trace. This can be minimized by spacing traces apart, using guard traces, and controlling the board stack-up.
  • Reflections – Reflections occur when a signal encounters an impedance mismatch, such as an unterminated trace. The signal reflects back and forth, distorting the waveform.
  • Ground bounce – Fast switching currents can cause the ground reference to move up and down due to inductance in the ground path. This is known as ground bounce.

Power Integrity

Maintaining a clean, stable power supply is also essential in high speed designs. As edge rates get faster, even small amounts of power supply noise can cause signal integrity issues.

Important aspects of power integrity include:

  • Decoupling – Local decoupling capacitors provide a low impedance path for high frequency noise to get shunted to ground. They should be placed as close as possible to the power pins.
  • Plane capacitance – The power and ground planes in the PCB stack-up form a parallel plate capacitor that provides additional decoupling. This plane capacitance is very effective at high frequencies.
  • Split planes – In some cases it may be necessary to split the power and ground planes to isolate noisy circuits from sensitive ones. Care must be taken to stitch the planes together with capacitors to avoid creating slots.

EMI/EMC

At high frequencies, PCBs can act as antennas and both radiate and pick up electromagnetic interference (EMI). Meeting EMC regulations and avoiding interference requires careful design.

Some important EMI/EMC considerations:

  • Shielding – Metal shielding can be used to contain EMI radiating from the PCB or protect sensitive circuits from external fields. The shielding must have a good conductive path to ground.
  • Grounding – A good grounding strategy is critical for EMI. Ground loops and common impedance paths can cause coupling between circuits. Separating analog and digital grounds can help.
  • Filtering – Power supply and I/O lines entering and exiting the PCB should be filtered to block high frequency noise. Common mode chokes, ferrite beads, and pi-filters are often used.
  • Spread spectrum clocking – Spread spectrum techniques dither the clock frequency to spread its energy over a wider band. This reduces the peak emisisons.

Board Stack-up

The arrangement of copper and dielectric layers in the board, known as the stack-up, plays a major role in high speed performance. A good stack-up provides controlled impedance, minimizes crosstalk, and provides good power delivery.

Some key aspects of high speed stack-ups include:

  • Controlled dielectrics – The dielectric material between layers must have a consistent dielectric constant (Dk) in order to control impedance. Using materials with low loss (Df) helps maintain signal integrity.
  • Symmetry – A symmetrical stack-up with equal thicknesses of dielectric helps prevent warpage during manufacturing. Placing signal layers between planes also shields them from EMI.
  • Trace geometry – The width and thickness of the copper traces determines their characteristic impedance. Thinner dielectrics allow for narrower traces.
  • Microstrip vs stripline – On outer layers, traces run in a microstrip configuration with the signal trace referenced to a single plane. On inner layers, traces run as striplines referenced to planes above and below.

High Speed Design Techniques

Designing for high speed requires a range of specialized techniques:

Terminations

High speed signals must be properly terminated to prevent reflections. There are several types of termination commonly used:

  • Series termination – A resistor in series with the driver matches the impedance and absorbs reflections from the far end of the trace. Best for point-to-point traces.
  • Parallel termination – A resistor in parallel at the end of the trace matches the impedance and absorbs reflections. Often used in bus topologies.
  • AC termination – A capacitor and resistor in series provides a high impedance at DC but matches the AC impedance. Used for capacitive-coupled interfaces.
  • Differential termination – Differential pairs are typically terminated at the receiver end with a resistor equal to their differential impedance.

Length Matching

In high speed designs, it’s important that certain signals arrive at their destinations at the same time. Trace lengths must be matched to ensure this.

Some examples of signals that often need length matching:

  • Clock signals – The clock lines to synchronous devices must be length matched so that all devices see the clock edge at the same time.
  • Busses – Data and address lines in parallel busses should be length matched. Skew between bits can limit the maximum data rate.
  • Differential pairs – The P and N lines of a differential pair must be the same length to avoid skew that can convert differential signals to common-mode noise.

Differential Pairs

Differential signaling uses two complementary signals to transmit data. This has several advantages for high speed designs:

  • Noise immunity – Noise coupled onto the lines appears as common-mode and is rejected by the differential receiver. This greatly improves noise margins.
  • Reduced EMI – The equal and opposite currents on the P and N lines create opposing magnetic fields that largely cancel, minimizing emitted EMI.
  • Reduced crosstalk – The coupled noise from adjacent traces appears as common-mode and is rejected.

To realize these benefits, differential pairs must be carefully routed:

  • Coupling – The traces should be closely coupled with a spacing less than the height to the reference plane. This causes most of the field to be contained between the traces.
  • Impedance – The differential impedance of the pair is determined by the spacing between traces as well as the height to the reference plane. This impedance must be matched at the source and load.
  • Bends – If bends are needed, they should be applied to both traces to keep them coupled. Avoid splitting the pair around obstacles.

Crosstalk Mitigation

Crosstalk between adjacent traces can be a major source of noise in high speed designs. There are several techniques to mitigate it:

  • Spacing – Increasing the spacing between traces reduces the coupling between them. A good rule of thumb is to space traces at least 3x the trace width apart.
  • Guard traces – Placing a grounded trace between signal traces shunts any coupled energy to ground. The guard trace should be at least as tall as the signal traces.
  • Offset striplines – On inner layers, the traces can be offset so they are not broadside coupled. This reduces the coupling area.
  • Orthogonal routing – Routing traces on adjacent layers perpendicular to each other avoids broadside coupling.

PCB Material Selection

The choice of materials used in the PCB can have a significant impact on high speed performance. Important material properties to consider include:

Dielectric Constant (Dk)

The dielectric constant of the insulating material between copper layers determines the characteristic impedance of the traces. A lower Dk allows for wider traces for a given impedance.

Some common high speed dielectrics include:

Material Dk
FR-4 4.3
Rogers 4350B 3.48
Isola 370HR 3.70
GETEK 3.55

Dissipation Factor (Df)

The dissipation factor is a measure of the loss in the dielectric material. Higher losses mean more signal attenuation and dispersion at high frequencies.

Some example Df values for high speed materials:

Material Df
FR-4 0.022
Rogers 4350B 0.0037
Isola 370HR 0.005
GETEK 0.010

Copper Roughness

The roughness of the copper foil used for the traces impacts the loss at high frequencies. Smoother copper has lower loss but is more expensive.

Some common classes of copper foil:

Type Rz (μm)
Standard (STD) 8.5
Very Low Profile (VLP) 4.0
Hyper Very Low Profile (HVLP) 1.6

Simulation Tools

Due to the complexity of high speed designs, simulation is an essential part of the design process. Specialized tools are used to analyze signal integrity, power integrity, and EMI.

Some commonly used high speed simulation tools include:

IBIS Models

Input/output Buffer Information Specification (IBIS) models are behavioral models of IC I/O buffers used for signal integrity simulations. They allow the PCB to be simulated without requiring the IC vendor to share proprietary transistor-level information.

SPICE

Simulation Program with Integrated Circuit Emphasis (SPICE) is a general-purpose analog circuit simulator. It can be used to simulate transmission lines, terminations, and other circuit elements. More specialized versions like HSpice are optimized for high speed simulations.

Power Integrity Tools

Specialized tools like Ansys SIwave and Cadence Sigrity are used to simulate power delivery networks. They can identify issues like excessive voltage ripple, resonances, and simultaneous switching noise (SSN).

3D EM Tools

3D electromagnetic field solvers like Ansys HFSS and Keysight Empro are used to simulate complex structures like connectors, packages, and antennas. They provide accurate results but are computationally intensive.

By leveraging these simulation tools, high speed designers can identify and correct issues before the PCB is built, saving time and cost.

PCB Layout Tools

Layout of high speed PCBs requires EDA tools with specialized features. Some capabilities to look for include:

  • Constraint-driven layout – The ability to specify electrical constraints like matched lengths, differential pairs, and spacing that are enforced during layout.
  • High speed routing – Automatic routing that obeys high speed constraints like impedance matching and space/trace width rules.
  • Integrated simulation – The ability to run signal integrity and power integrity simulations directly in the layout environment for rapid feedback.
  • 3D rendering – Viewing the board in 3D to check mechanical clearances and visualize complex structures.

Some popular high speed PCB layout tools include:

  • Cadence Allegro
  • Mentor Graphics Xpedition
  • Zuken CR-8000
  • Altium Designer

Frequently Asked Questions

What is considered a high speed signal?

There is no hard cutoff, but generally signals with rise times less than 1 ns or frequencies above 50 MHz are considered high speed. At these speeds, the wavelength becomes comparable to the trace lengths, requiring transmission line design techniques.

Do I need a 4-layer PCB for high speed design?

While 4-layer is the minimum recommended for high speed designs, complex designs may require 6, 8, or even more layers. More layers allows for better power distribution and shielding of signals.

What is the best dielectric for high speed PCBs?

There is no one “best” dielectric – the choice depends on the specific requirements of the design. Lower Dk materials like Rogers 4350B allow for wider traces and better impedance control. Lower Df materials like Isola 370HR have less loss at high frequencies.

How important is the PCB material for high speed designs?

Very important! The dielectric properties of the PCB material determine the trace impedance and losses. Using a cheap material like standard FR-4 can lead to signal integrity issues at high frequencies.

What is the biggest challenge in high speed PCB design?

One of the biggest challenges is managing the complexity. With so many interrelated factors like impedance, crosstalk, power integrity, and EMI, it can be difficult to find the right balance. Extensive simulation is required to ensure the design will work as intended. Even small oversights can lead to big problems in the final product.

Conclusion

High speed PCB design is a complex and specialized field that requires a deep understanding of signal integrity, power integrity, and EMI principles. By following best practices and leveraging modern simulation and layout tools, designers can successfully navigate the challenges and create reliable, high-performance products. As speeds continue to increase, the techniques and tools used will continue to evolve, making high speed design an exciting and dynamic field.

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